Kaepora Gaebora posting on main :did-you-get-all-that:

Artist is "Hail-NekoYasha", source at https://www.deviantart.com/hail-nekoyasha/art/O-RLY-NTNDO-33158110

Sometimes I like to look up the origin of the taglines. So I looked one up and found this old thread...

https://hexbear.net/post/1640059

I don't know this for sure, but I'm almost certain all of the other accts in this thread were eventually banned for being alts of DayOfDoom (HaruhiSuzumiya got herself banned during that thread about DayOfDoom's banning by being sus about it, the other got banned around the same time for unspecified ban evasion)

Literally arguing with themselves, completely artificial thread, and managed to get into a tagline

My honest reaction to this information:

!

The tagline from this thread is:

>Apart from further Luna Rossa flankers, would also recommend (re) testing more of the Prada Infusions for a less gourmand, sweet and/or woody, also fresher, crisper and more transparent take on somewhat similar notes, as well as the many AMen flankers, perhaps especially Pure Wood and Pure Tonka, while not entirely dismissing the other flankers and maybe also Kenzo Homme Boisee to certain extents

cross-posted from: https://hexbear.net/post/2429776

> Beanis bed reactor > > Great potential here

can someone else use my machine as a router to forward traffic to anywhere else on the internet?

I'm not entirely sure what the security implications of that would even be if true but probably nothing good

I don't have any other routes in my routing table other than my "default" route and this machine is reachable via a globally routable IPv4 address. Also I think there are probably other machines on the same subnet (cloud VPS)

He isn't even favored by StarClan, it's obvious he hasn't received his 9 lives smh

StarClan would never let a Clan leader commit a genocide under their watch !clueless

I wish nothing but pain and suffering upon people who project their reactionary opinions onto cute animals and internet personalities like big floppa

Link cuz I'm not a lib:

https://old.reddit.com/r/bigfloppa/comments/1b9j1sv/happy_womens_day/

!reddit-logo couldn't even manage a ratio:

!

cross-posted from: https://hexbear.net/post/2029720

> I was thinking of getting one of these as a cheap replacement for my broken (and disappointing) Pinephone Pro. > > What's the experience like?

I was thinking of getting one of these as a cheap replacement for my broken (and disappointing) Pinephone Pro.

What's the experience like?

My honest reaction: !oooaaaaaaauhhh

Link cuz I'm not a lib (beware: unmarked spoilers): https://tvtropes.org/pmwiki/pmwiki.php/WMG/WarriorCats

rant with spoilers for the Warrior Cats books

So bad on multiple levels: the conception of the US as a place accepting of "diversity and outcasts", ShadowClan as a flat, generic, enemy camp like what liberals think !soypoint-1 !russia-cool !soypoint-2 is, WindClan as Great Britain probably solely based on the """special relationship""" that ThunderClan and WindClan had that only existed in the short time between just prior to the battle with BloodClan and shortly after Tallstar's death (historical blip), or that what ThunderClan does in its interactions with other clans (generally cat geopolitics on an equal footing) is similar to what the US does (imperialism), and so on and so on !zizek-theory

But the person who wrote that could have been an actual child so it's whatever lol

Don't look up the USSR on TVtropes, worst mistake of my life

!peter-running

>capitalizing "GUN" as though it mattered looked rather like hoplophobia

Link: https://news.ycombinator.com/item?id=24749158

cross-posted from: https://hexbear.net/post/1747735

> CPU-posting on main > > MTI = MIPS Technologies (company that made MIPS (Microprocessor without Interlocked Pipeline Stages) processors, they make RISC-V processors now lmao) > > At the time when the MIPS R10000, known as the "T5" while in development, was being designed, MTI had made a name for themselves as designers of high-performance computer microprocessors along the lines of the then-new philosophy of reduced instruction set computing (RISC). Actually, their R2000 design was the first commercially-available RISC microprocessor. By the time the T5 was being designed, they were no longer alone in the RISC microprocessor market. Several companies, including IBM and Motorola (joined together in the AIM alliance which produced PowerPC), DEC (who designed the Alpha line of RISC microprocessors after MTI owned them in the 80s when their radically simpler chips were performing better than VAXen), and Sun Microsystems (who were making the SPARC line of microprocessors) were now marketing RISC microprocessors. Not just even marketing but beating MTI in the market they had created. After trying and failing to develop their own complete computer systems alongside their chips, they were having financial difficulties until Silicon Graphics acquired MTI to secure availability of MIPS microprocessors for their famous ("it's a Unix system, I know this!") MIPS-based workstations and servers. Although their new (in 1993) R4000 and R4400 designs performed well compared to their contemporaries, they were quickly being made obsolete by MTI's competitor's new offerings and they were left with a problem: > > The MIPS R4000 and the R4400, which is essentially an R4000 with bigger on-die caches, were more or less just an architectural evolution from the R2000. The R4000 made its performance in much the same way as the R2000 did, the classic RISC design process mantra: "let's make it simpler" and thus be able to run it faster. In particular, what this means for the R4000, and what is a key difference from its predecessors and its contemporaries, is a technique called superpipelining. In an instruction pipeline, the maximum speed at which your processor can issue instructions is set by the pipeline stage which takes the longest to complete. Superpipelining is one way of addressing this problem: you can subdivide each pipeline stage into 2 simpler pipeline stages that individually complete faster and thus be able to clock your chip faster without problems. However, this has its limits. Eventually, it becomes impossible to further "deepen" the pipeline like this or clock the processor faster in general without other problems. This is why MTI's competitors opted for the analogous superscalar approach: you can duplicate functional units of your processor and have multiple instructions "in flight" at the same time and usually this also involves multiple pipelines. At the time MTI thought this approach would result in more consistently higher performance (not to mention save die space) but were quickly proven wrong when their competitor's superscalar (and often with other architectural tricks) chips were outperforming the R4000 in spite of MTI's fabrication partners constantly improving their process and releasing chips that ran at higher and higher speeds. > > Enter the MIPS R8000 (die not pictured here) in 1994, a weird and expensive 6-chip 4-way superscalar design meant for the high-end microprocessor market while the next-generation T5 (which would become the MIPS R10000, as mentioned earlier) was under development. It didn't sell well because of its high price and the fact that its integer performance, important for general-purpose computing applications, was lacking compared to the 200-MHz R4400 that was being sold by then. It did, however, have impressive floating-point performance, which landed many R8000-based systems in the TOP500 supercomputer list for a time. But this design could never be the high-performance and general-purpose processor MTI needed to compete with their competitor's offerings... > > Introduced in 1996, the MIPS R10000 (die IS pictured here) was a significant departure from the architecture of the R4000 (which more or less was directly derived from the first research done at Stanford University where MIPS was initially created over a decade earlier). Dropping the superpipeline approach, the R10000 is a 4-way superscalar processor even capable of executing instructions out of order! Another big change is that it has a branch predictor and speculatively executes instructions after a branch as opposed to the R4000, which used the classic MIPS "branch delay slot" technique to schedule one more instruction in the pipeline after a branch and then stall lol (they should have added even more delay slots, caring about binary compatibility is liberalism). It's hard to find benchmarks for something this old but this design performed at least several times faster than an R4400 at about the same clock speed! > > If you like my CPU posting and want me to post more in the future let me know > > Also ask me any questions if you want too and I'll try to answer

CPU-posting on main

MTI = MIPS Technologies (company that made MIPS (Microprocessor without Interlocked Pipeline Stages) processors, they make RISC-V processors now lmao)

At the time when the MIPS R10000, known as the "T5" while in development, was being designed, MTI had made a name for themselves as designers of high-performance computer microprocessors along the lines of the then-new philosophy of reduced instruction set computing (RISC). Actually, their R2000 design was the first commercially-available RISC microprocessor. By the time the T5 was being designed, they were no longer alone in the RISC microprocessor market. Several companies, including IBM and Motorola (joined together in the AIM alliance which produced PowerPC), DEC (who designed the Alpha line of RISC microprocessors after MTI owned them in the 80s when their radically simpler chips were performing better than VAXen), and Sun Microsystems (who were making the SPARC line of microprocessors) were now marketing RISC microprocessors. Not just even marketing but beating MTI in the market they had created. After trying and failing to develop their own complete computer systems alongside their chips, they were having financial difficulties until Silicon Graphics acquired MTI to secure availability of MIPS microprocessors for their famous ("it's a Unix system, I know this!") MIPS-based workstations and servers. Although their new (in 1993) R4000 and R4400 designs performed well compared to their contemporaries, they were quickly being made obsolete by MTI's competitor's new offerings and they were left with a problem:

The MIPS R4000 and the R4400, which is essentially an R4000 with bigger on-die caches, were more or less just an architectural evolution from the R2000. The R4000 made its performance in much the same way as the R2000 did, the classic RISC design process mantra: "let's make it simpler" and thus be able to run it faster. In particular, what this means for the R4000, and what is a key difference from its predecessors and its contemporaries, is a technique called superpipelining. In an instruction pipeline, the maximum speed at which your processor can issue instructions is set by the pipeline stage which takes the longest to complete. Superpipelining is one way of addressing this problem: you can subdivide each pipeline stage into 2 simpler pipeline stages that individually complete faster and thus be able to clock your chip faster without problems. However, this has its limits. Eventually, it becomes impossible to further "deepen" the pipeline like this or clock the processor faster in general without other problems. This is why MTI's competitors opted for the analogous superscalar approach: you can duplicate functional units of your processor and have multiple instructions "in flight" at the same time and usually this also involves multiple pipelines. At the time MTI thought this approach would result in more consistently higher performance (not to mention save die space) but were quickly proven wrong when their competitor's superscalar (and often with other architectural tricks) chips were outperforming the R4000 in spite of MTI's fabrication partners constantly improving their process and releasing chips that ran at higher and higher speeds.

Enter the MIPS R8000 (die not pictured here) in 1994, a weird and expensive 6-chip 4-way superscalar design meant for the high-end microprocessor market while the next-generation T5 (which would become the MIPS R10000, as mentioned earlier) was under development. It didn't sell well because of its high price and the fact that its integer performance, important for general-purpose computing applications, was lacking compared to the 200-MHz R4400 that was being sold by then. It did, however, have impressive floating-point performance, which landed many R8000-based systems in the TOP500 supercomputer list for a time. But this design could never be the high-performance and general-purpose processor MTI needed to compete with their competitor's offerings...

Introduced in 1996, the MIPS R10000 (die IS pictured here) was a significant departure from the architecture of the R4000 (which more or less was directly derived from the first research done at Stanford University where MIPS was initially created over a decade earlier). Dropping the superpipeline approach, the R10000 is a 4-way superscalar processor even capable of executing instructions out of order! Another big change is that it has a branch predictor and speculatively executes instructions after a branch as opposed to the R4000, which used the classic MIPS "branch delay slot" technique to schedule one more instruction in the pipeline after a branch and then stall lol (they should have added even more delay slots, caring about binary compatibility is liberalism). It's hard to find benchmarks for something this old but this design performed at least several times faster than an R4400 at about the same clock speed!

If you like my CPU posting and want me to post more in the future let me know

Also ask me any questions if you want too and I'll try to answer

No, that was just a bit

Gosha is too powerful of a being to suffer from scurvy

Is it actually possible to make any good money doing that or am I better off doing surveys or some shit for money on the side lol

!hitler-detector

Original poster dunk: !

Link cuz I'm not a lib: https://www.youtube.com/watch?v=kJDunv97muc

Edit: the server is live at byond://157.230.217.31:9999 !

Brief instructions:

Get the BYOND client, make an account, and log in.

Click "Space Station 13" in the game list.

Click this gear icon in the top right of the window: !

Click open location and paste in the link at the top of the post starting with "byond://" and press OK. Then you should connect!

------- Me and @WithoutFurtherRelay@hexbear.net have been talking about running a Hexbear SS13 server for a bit and we just now got it in a working state for testing.

Around 4 PM US EST / 7 PM UTC I'll edit this post with the IP address so anyone who wants to play can join. It's okay if you haven't played before.

All you need to play is the BYOND client from here:

https://www.byond.com/

Come join us in running/blowing up our space station!

There may be a few technical problems we haven't foreseen yet but we'll deal with them if it happens.

Here is our Discord discussion group if you're interested:

https://discord.gg/Qcy6enC2h5

We are gonna replace it with something more secure and private sometime. Didn't we have a Matrix server once?

Me and @WithoutFurtherRelay@hexbear.net were discussing practical aspects of hosting a Space Station 13 server. In particular, we were concerned about the risks of running internet services out of our home internet connections. It pretty much advertises the locality you live in and connects any other services/activity at the same IP address to your Hexbear identity. The usual alternative is to buy some server time from someone else with an internet connection but the costs can add up to a lot if everyone is buying server time individually for their services.

Initally, we were discussing buying some server time for our own use to proxy connections to our home network to run our game server but we thought it might be more efficient and helpful for the community to make this available to everyone here who wants to run an internet service.

Basically, the idea is that instead of exposing a service on your home IP address for everyone on the internet to see, you connect to our server and it accepts connections on its own IP address for you and proxies the traffic back to your home network. So, if you want to tell someone how to access your service, all you need to give them is our server's IP address and a port.

Of course, this has little to no effect on people with a grand ability to surveil internet traffic (!fedposting) but it would expose a lot less information to other bad actors and make running internet services easier.

There would also need to be trust between the maintainers of this proxying service (who could collect the network information and traffic of the users, for example) and the users (who could use the proxy to forward malicious traffic, for example) so we thought it would be most useful if it were a community project. Maybe some of the risks could be minimized by restrictive firewall rules like not allowing users to send traffic out to the public internet unless it were a response to incoming traffic but maybe that is a feature we want?

Anyway, what does everyone think about this idea? Is it worth exploring and implementing or is it a bad idea? Sorry if I was a bit vague because I'm still thinking about the best way to implement this idea.

Idea of @WithoutFurtherRelay@hexbear.net

!

It seems I hit some kind of image upload limit.

https://upload.wikimedia.org/wikipedia/commons/thumb/6/65/Buzludzha_Monument_Auditorium.jpg/1920px-Buzludzha_Monument_Auditorium.jpg

https://upload.wikimedia.org/wikipedia/commons/c/cf/%D0%91%D1%83%D0%B7%D0%BB%D1%83%D0%B4%D0%B6%D0%B0_IMG6338.jpg

https://upload.wikimedia.org/wikipedia/commons/c/cf/Buzludzha_%26_Torch_Monument.jpg

https://shrineodreams.files.wordpress.com/2012/03/buz_opening.jpg

https://buzludzha-tour.com/wp-content/uploads/2016/03/cats2.jpg

On this day in 1983, a patent was granted to MIT for a new cryptographic algorithm: RSA. "RSA" stands for the names of its creators Rivest, Shamir, and Adlemen. RSA is a "public-key" cryptosystem. Prior to the creation of RSA, public-key cryptography was not in wide use.

Public-key cryptography

Cryptography is the study and practice of secure communication. Throughout most of its historical use, cryptographic techniques were entirely dependent on the involved parties already sharing a secret that could be used to reverse an encryption process. In early cryptography, the secret was itself the encryption process (for example, a Caesar cipher that substitutes letters in a secret message with letters a fixed number of steps down the alphabet). As cryptography became more systematic and widespread in use, it became necessary to separate cryptographic secrets from the cryptographic techniques themselves because the techniques could become known by the enemy (as well as static cryptographic schemes being more vulnerable to cryptanalysis). Regardless, there is still the issue of needing to share secrets between the communicating parties securely. This has taken many forms over the years, from word of mouth to systems of secure distribution of codebooks. But this kind of cryptography always requires an initial secure channel of communication to exchange secrets before an insecure channel can be made secure by the use of cryptography. And there is the risk of an enemy capturing keys and making the entire system worthless.

Only relatively recently has this fundamental problem been addressed in the form of public-key cryptography. In the late 20th century, it was proposed that a form of cryptography could exist where the 2 parties, seeking to communicate securely, could exchange some non-secret information (a "public" key) derived from privately held secret information (a "private" key), and use a mathematical function (a "trap-door" function) that is easy to compute in one direction (encryption) but hard to reverse without special information (decryption) to encipher messages to each other, using each other's respective public keys, that can't be easily decrypted without the corresponding private key. In other words, it should be easy to encipher messages to each other using a public key but hard to decrypt messages without the related private key. At the time this idea was proposed there was no known computationally-hard trap-door function that could make this possible in practice. Shortly after, several candidates and cryptosystems based upon them were described publicly 👁, including one that is still with us today...

RSA

Ron Rivest, Adi Shamir, and Leonard Adleman at MIT had made many attempts to find a suitably secure trap-door function for creating a public-key cryptosystem over a year leading up to the publication of their famous paper in 1978. Rivest and Shamir, the computer scientists of the group, would create a candidate trap-door function while Adleman, the mathematician, would try to find a way to easily reverse the function without any other information (like a public key). Supposedly, it took them 42 attempts before they created a promising new trap-door function.

As described in their 1978 paper "A method for obtaining digital signatures and public-key cryptosystems", RSA is based upon the principle that factoring very large numbers is computationally difficult (for now!). The paper is a great read, if you're interested in these topics. The impact of RSA can't be overstated. The security of communications on the internet have been dependent on RSA and other public-key cryptosystems since the very beginning. If you check your browser's connection info right now, you'll see that the cryptographic signature attached to Hexbear's certificate is based on RSA! In the past, even the exchange of symmetric cipher keys between your web browser and the web server would have been conducted with RSA but there has been a move away from that to ensure the compromise of either side's RSA private keys would not compromise all communications that ever happened.

The future of RSA?

In 1994, a mathematician named Peter Shor, developed an algorithm for quantum computers that would be capable of factoring the large integers used in the RSA scheme. In spite of this, RSA has seen widespead and increasing use in securing communications on the internet. Until recently, the creation of a large enough quantum computer to run Shor's algorithm at sufficient scale was seen as very far off. With advances in practical quantum computers though, RSA is on its way out. Although current quantum computers are still a very long way off from being able to break RSA, it's looking more and more plausable that someone could eventually build one that is capable of cracking RSA. A competition being held by the US National Institute of Standards and Technology, similar to the one that selected the Advanced Encryption Algorithm, is already underway to select standard cryptographic algorithms that can survive attacks from quantum computers.

Megathreads and spaces to hang out:

• ❤️ Come listen to music and Watch movies with your fellow Hexbears nerd, in Cy.tube
• 💖 Come talk in the New Weekly Queer thread
• 💛 Read and talk about a current topics in the News Megathread
• ⭐️ September Movie Nominations ⭐️

reminders:

• 💚 You nerds can join specific comms to see posts about all sorts of topics
• 💙 Hexbear’s algorithm prioritizes comments over upbears
• 💜 Sorting by new you nerd
• 🌈 If you ever want to make your own megathread, you can reserve a spot here nerd
• 🐶 Join the unofficial Hexbear-adjacent Mastodon instance toots.matapacos.dog

Links To Resources (Aid and Theory):

Aid:

• 🌈 LGBTQ+ Resource Post
• 💚 Resources for Palestine
• 🐌☕ Zapatista Coffee

Theory:

• ❤️Foundations of Leninism
• ❤️Anarchism and Other Essays